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wiznet W7500P cortex M0 circuit board and FreeRTOS 9.0.0rc2 working

I have made my new cortex M0 based microcontroller board operational with FreeRTOS.
The chip is a W7500P
- a cortex M0 with 16KB SRAM and 128KB Flash
- hardware tcp/ip stack incl mac/phy on board (P101G)

This chip is a single chip microcontroller/ethernet/internet IoT solution, no software TCP/IP stack that can fail or hacked. For TCP/IP buffers it has another 32KB SRAM, this can be used by 8 simultaneous TCP connections (sockets open at same time).

I like this chip because it eliminates a lot of other stuff on the board. It is fast, and has lots of IO.
I added a SD-card connector for data-logging applications.
My main application will be small measurement and control applications, adding network easily and securely, super fast bootup times (0.1 sec instead of 20 sec, no linux based board with large bodies of software)

  • ADC : 12bit, 8ch, 1Msps
  • DMA
    • 6-channel DMA controller
    • Peripheral supported: UARTs, SPIs
  • GPIO
    • 34 I/Os 
  • Debug mode
    • Serial Wire Debug (SWD)
  • Timer/PWM
    • 1 Watchdog (32-bit down-counter)
    • 4 Timers (32-bit or 16-bit down-counter)
    • 8 PWMs (32-bit counter/timers with programmable 6-bit prescaler)
  • Communication Interfaces
    • 3 UART (2 UARTs with FIFO and Flow Control, 1 simple UART)
    • 2 SPI
    • 2 I2C (Master/Slave, Fast-mode (400 kbps))
  • Crypto
    • 1 RNG (Random Number Generator): 32-bit random number
Lots of issues had to be figured out eg:
- form factor and connector locations, choice of peripherals to add to the main board
- adding of RF chokes and capacitors in both digital and analog power distribution
- design of the schematic, including choice of components, eg. RJ45 and magnetics
- some parts had to be designed (schematic and footprint)
- design of the circuit board, 4 layer board, taking into account design rules and EMI issues
- assembly of the board, including component placement and soldering

The board was designed in KiCad (

The boards were hand-soldered by me, the pitch for the W7500P is 0.4mm, that is 0.2 mm spacing between tracks.

- toolchain had to be figured out, including linking (modified LD files)
- system initialisation had to change
- clock speed, now runs at 48MHz from external crystal.
- debugging using the SWD interface, using a ST-LINK interface
- programming using ISP over serial port, the S_UART (simple uart) of the chip

After the primary tests were done and found to work, eg. webserver, led-blinky it was time to port FreeRTOS to this board.

Today the FreeRTOS 9.0.0rc2 ran without troubles.

If you want something like this too, this design can be used in your OEM product, just give me a call.


900 zei…
Hi, how can you program via ISP? how about the wiring and programmer software you use? thanks a lot

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